文部科学省大学間連携共同教育推進事業「未来像を自ら描く電気エネルギー分野における実践的人材の育成」
Introduction to Scheme and Control for Interleaved three phase PWM Voltage Source Inverters [1月31日（火）福岡工業大学]
2017/01/05
【科目種別】電気エネルギー講座Ⅱ（英語科目）
■講 師： Prof. Dr. Yong Keun Lee
■ご所属： Seoul National University of Technology
■演 題： Introduction to Scheme and Control for Interleaved three phase PWM Voltage Source Inverters
■日 時： 平成 29年 1 月 31 日（火）16:20～17:50
■場 所： 福岡工業大学 A棟6階大学院ゼミ室
http://www.fit.ac.jp/shisetsu/campus/map/index
■主 催： 福岡工業大学 大学院工学研究科
■申込/お問合せ： 福岡工業大学大学院事務室 master[at]fit.ac.jp
■概要
The interleaved 3 Phase PWM inverters are getting popular to various reasons such as low cost, modular design, high power rating, high reliability, high flexibility, and so no. However, when two inverters are connected in parallel, there will be paths formed for cross and zero sequence current between them. Therefore, it is critical to minimize those currents in order to enjoy the privilege and the all the benefits of the interleaved inverters mentioned above. In this presentation, a simple scheme and control algorithm for two interleaved 3 phase PMW Voltage Source Inverters will be introduced. It is designed to minimize the cross current and zero sequence current between two parallel connected PWM inverters via current balancers. In this work, current control was adopted in order to minimize the response time. It works well with steady state where a low harmonic current must be maintained and transient state where a quick current response is required. In this presentation, not only presenting the previous published milestone works which is a basis of our modified control algorithm, but also, its newly modified control algorithm and simulation results with a Matlab and Simulink will be presented in details. Lastly, the previous works in the fields of power electronics in our SNUT lab will be introduced with a hope to open up fruitful discussion.
■講 師： Prof. Dr. Yong Keun Lee
■ご所属： Seoul National University of Technology
■演 題： Introduction to Scheme and Control for Interleaved three phase PWM Voltage Source Inverters
■日 時： 平成 29年 1 月 31 日（火）16:20～17:50
■場 所： 福岡工業大学 A棟6階大学院ゼミ室
http://www.fit.ac.jp/shisetsu/campus/map/index
■主 催： 福岡工業大学 大学院工学研究科
■申込/お問合せ： 福岡工業大学大学院事務室 master[at]fit.ac.jp
■概要
The interleaved 3 Phase PWM inverters are getting popular to various reasons such as low cost, modular design, high power rating, high reliability, high flexibility, and so no. However, when two inverters are connected in parallel, there will be paths formed for cross and zero sequence current between them. Therefore, it is critical to minimize those currents in order to enjoy the privilege and the all the benefits of the interleaved inverters mentioned above. In this presentation, a simple scheme and control algorithm for two interleaved 3 phase PMW Voltage Source Inverters will be introduced. It is designed to minimize the cross current and zero sequence current between two parallel connected PWM inverters via current balancers. In this work, current control was adopted in order to minimize the response time. It works well with steady state where a low harmonic current must be maintained and transient state where a quick current response is required. In this presentation, not only presenting the previous published milestone works which is a basis of our modified control algorithm, but also, its newly modified control algorithm and simulation results with a Matlab and Simulink will be presented in details. Lastly, the previous works in the fields of power electronics in our SNUT lab will be introduced with a hope to open up fruitful discussion.
